Pipelined 64-point Fast Fourier Transform for Programmable Logic Devices
نویسندگان
چکیده
This paper describes the design and implementation of a fully pipelined 64-point Fast Fourier Transform (FFT) in programmable logic. The FFT takes 20-bit fixed point complex numbers as input and after a known pipeline latency produces 20-bit complex values representing the FFT of the input. It is designed to allow continuous input of samples and is therefore suitable for use in real-time systems. The modular design allows it to be used together with other 64-point FFTs to create larger sizes, much as this design is built using smaller 8-point FFTs. Such a design has many applications in high-speed real-time systems such as wireless networking, spectral analysis, recognition systems, and more.
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